r07ds0123ej0200 rev.2.00 page 1 of 7 sep 01, 2010 preliminary datasheet rje0607jsp silicon p channel mos fet series power switching description this fet has the over temperature shut-down capability sensin g to the junction temperature. this fet has the built-in over temperature shut-down circuit in the gate area. and this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. features ? high endurance capability against to the short circuit. ? built-in the over temperature shut-down circuit. ? latch type shut down operation (need 0 voltage recovery). ? built-in the current limitation circuit. ? low on-resistance r ds(on) : 140 m ? typ, 260 m ? max (v gs = ?10 v) ? high density mounting outline 1 2 3 4 5 6 7 8 1, 3 source 2, 4 gate 5, 6, 7, 8 drain renesas package code: prsp0008dd-d (package name: sop-8 (fp-8dav)) mos1 d s g 2 1 78 d gate resistor temperature sensing circuit latch circuit gate shut-down circuit current limitation circuit mos2 d s g 4 3 56 d gate resistor temperature sensing circuit latch circuit gate shut-down circuit current limitation circuit absolute maximum ratings (ta = 25c) item symbol ratings unit drain to source voltage v dss ?60 v gate to source voltage v gss ?16 v gate to source voltage v gss 2.5 v drain current i d note5 ?1.5 a body-drain diode reverse drain current i dr ?1.5 a avalanche current i ap note 4 ?1.5 a avalanche energy e ar note 4 9.6 mj channel dissipation pch note 2 2 w channel dissipation pch note 3 1.5 w channel temperature tch 150 ?c storage temperature tstg ?55 to +150 ?c notes: 1. value at tc = 25 ?c 2. 1 drive operation : when usin g the glass epoxy board (fr4 40 ? 40 ? 1.6 mm), pw ? 10 s 3. 2 drive operation : when usin g the glass epoxy board (fr4 40 ? 40 ? 1.6 mm), pw ? 10 s 4. tch = 25 ?c, rg ? 50 ? 5. it provides by the current limitation lower bound value. r07ds0123ej0200 (previous: rej03g1876-0100) rev.2.00 sep 01, 2010
rje0607jsp preliminary r07ds0123ej0200 rev.2.00 page 2 of 7 sep 01, 2010 typical operation characteristics (ta = 25c) item symbol min typ max unit test conditions v ih ?3.5 ? ? v input voltage v il ? ? ?1.2 v i ih1 ? ? ?100 ? a vi = ?8 v, v ds = 0 i ih2 ? ? ?50 ? a vi = ?3.5 v, v ds = 0 input current (gate non shut down) i il ? ? ?10 ? a vi = ?1.2 v, v ds = 0 i ih(sd)1 ? ?0.8 ? ma vi = ?8 v, v ds = 0 input current (gate shut down) i ih(sd)2 ? ?0.35 ? ma vi = ?3.5 v, v ds = 0 shut down temperature tsd ? 175 ? ?c channel temperature (dv/dt v gs ? 500 v/ms) gate operation voltage vop ?3.5 ? ?12 v drain current (current limitation value) i d limt ?1.5 ? ? a v gs = ?12 v, v ds = ?10 v note 4 notes; 6. pulse test electrical characteristics (ta = 25c) item symbol min typ max unit test conditions i d1 ? ? ?2 a v gs = ?3.5 v, v ds = ?10 v i d2 ? ? ?10 ma v gs = ?1.2 v, v ds = ?10 v drain current i d3 ?1.5 ? ? a v gs = ?12 v, v ds = ?10 v note 7 drain to source breakdown voltage v (br)dss ?60 ? ? v i d = ?10 ma, v gs = 0 v (br)gss ?16 ? ? v i g = ?800 ? a, v ds = 0 gate to source breakdown voltage v (br)gss 2.5 ? ? v i g = 100 ? a, v ds = 0 i gss1 ? ? ?100 ? a v gs = ?8 v, v ds = 0 i gss2 ? ? ?50 ? a v gs = ?3.5 v, v ds = 0 i gss3 ? ? ?10 ? a v gs = ?1.2 v, v ds = 0 gate to source leak current i gss4 ? ? 100 ? a v gs = 2.4 v, v ds = 0 i gs(op)1 ? ?0.8 ? ma v gs = ?8 v, v ds = 0 input current (shut down) i gs(op)2 ? ?0.35 ? ma v gs = ?3.5 v, v ds = 0 i dss1 ? ? ?10 ? a v ds = ?60 v, v gs = 0 zero gate voltage drain current i dss2 ? ? ?10 ? a v ds = ?48 v, v gs = 0 ta = 125 ?c gate to source cutoff voltage v gs(off) ?2.2 ? ?3.4 v v ds = ?10 v, i d = ?1 ma r ds(on) ? 185 380 m ? i d = ?0.75 a, v gs = ?6 v note 7 static drain to source on state resistance r ds(on) ? 140 260 m ? i d = ?0.75 a, v gs = ?10 v note 7 output capacitance coss ? 194 ? pf v ds = ?10 v, v gs = 0, f = 1mhz turn-on delay time t d(on) ? 1.82 ? ? s v gs = ?10 v, i d = ?0.75 a, rise time t r ? 1.95 ? ? s r l = 40 ? turn-off delay time t d(off) ? 0.99 ? ? s fall time t f ? 0.84 ? ? s body-drain diode forward voltage v df ? 0.83 ? v i f = ?1.5 a, v gs = 0 body-drain diode reverse recovery time t rr ? 85 ? ns i f = ?1.5 a, v gs = 0 di f /dt = 50 a/? s over load shut down operation time note 8 t os1 ? 18.6 ? ms v gs = ?5 v, v dd = ?16 v notes: 7. pulse test 8. including the junction temperature rise of the over loaded condition.
rje0607jsp preliminary r07ds0123ej0200 rev.2.00 page 3 of 7 sep 01, 2010 main characteristics ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
rje0607jsp preliminary r07ds0123ej0200 rev.2.00 page 4 of 7 sep 01, 2010 0 ?0.4 ?1.2 ?1.6 ?0.8 ?2.0 ?2.0 ?1.5 ?1.0 ?0.5 source to drain voltage v sd (v) reverse drain current vs. source to drain voltage reverse drain current i dr (a) 0 10 20 40 60 50 30 1000 100 10 capacitance c (pf) drain to source voltage v ds (v) typical capacitance vs. drain to source voltage v gs = 0 f = 1 mhz coss reverse drain current i dr (a) reverse recovery time t rr (ns) body-drain diode reverse recovery time drain current i d (a) switching time t (s) switching characteristics 0.1 1 10 100 1000 10 di / dt = 50 a / s v gs = 0, ta = 25 c 0.1 1 10 1 0.1 10 v gs = 10 v, v dd = 30 v pw = 300 s, duty 1 % t f t d(off) t d(on) t r pulse test case temperature tc ( c) static drain to source on state resistance vs. temperature 500 300 50 25 0 25 50 75 100 125 150 0 100 400 200 v gs = 6 v i d = 1 a i d = 0.2 a, 0.5 a, 1 a 0.2 a, 0.5 a 10 v pulse test v gs = 0 v ?5 v ?10 v 2 4 16 12 14 10 8 6 0 gate to source voltage v gs (v) gate to source voltage vs. shutdown time of load-short test 100 shutdown time of load-short test pw (ms) 11 0 v dd = 16 v static drain to source on state resistance r ds(on) (m)
rje0607jsp preliminary r07ds0123ej0200 rev.2.00 page 5 of 7 sep 01, 2010 200 180 160 140 120 0 gate to source voltage v gs (v) shutdown case temperature tc ( c) 100 2 4 6 8 10 i d = 0.2 a dv/dt v gs 500 v/ms shutdown case temperature vs. gate to source voltage 10 100 1 m 10 m 100 m 1 10 pulse width pw (s) normalized transient thermal impedance s (t) normalized transient thermal impedance vs. pulse width (1 drive operation) 100 1000 10000 10 1 0.1 0.01 0.001 0.0001 d = 1 0.5 0.2 0.1 0.05 0.02 0.01 1shot pulse dm p pw t d = pw t ch-f(t) = s (t) ? ch - f ch-f = 125c/w, ta = 25c when using the glass epoxy board (fr4 40 x 40 x 1.6 mm) 10 100 1 m 10 m 100 m 1 10 pulse width pw (s) normalized transient thermal impedance s (t) normalized transient thermal impedance vs. pulse width (operatioon of 2 devices; allowable value per device) 100 1000 10000 10 1 0.1 0.01 0.001 0.0001 d = 1 0.5 0.2 0.1 0.05 0.02 0.01 1shot pulse dm p pw t d = pw t ch-f(t) = s (t) ? ch - f ch-f = 166c/w, ta = 25c when using the glass epoxy board (fr4 40 x 40 x 1.6 mm)
rje0607jsp preliminary r07ds0123ej0200 rev.2.00 page 6 of 7 sep 01, 2010 50 vin monitor d.u.t. vin ?10 v r l v dd = ?30 v t r t d(on) vin 90% 90% 10% 10% vout t d(off) vout monitor 90% 10% t f switching time test circuit waveform
rje0607jsp preliminary r07ds0123ej0200 rev.2.00 page 7 of 7 sep 01, 2010 package dimensions p-sop8-3.95 4.9-1.27 0.085g mass[typ.] fp-8dav prsp0008dd-d renesas code jeita package code previous code a 8 5 1 4 f b p c detail f terminal cross section 1.27 1.08 0.40 l 1 0.60 0.25 x 0.4 60.4 00.34 0.10 b p b 1 c 1 0.25 0.20 0.15 max nom min dimension in millimeters symbol reference 5.3 4.90 d 3.95 e 0.14 a 2 6.20 6.10 5.80 0.25 1.75 a 0.75 z l 8 0 c 1.27 e 0.1 y h e a 1 d * 1 * 2 e h e * 3 x m b p e z (ni/pd/au plating) 2. 1. dimensions "*1(nom)" and "*2" do not include mold flash. note) dimension "*3" does not include trim offset. index mark a 1 l 1 l detail f y package name sop-8 ordering information part no. quantity shipping container rje0607jsp-00-j0 2500 pcs/reel taping
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